Storage systems often employ decoders, such as, but not limited to LDPC decoders, to maintain data integrity by operating on codewords formed by one or more bits of at least one data segment. Some decoders include one or more check node units (CNUs) configured to receive variable node unit (VNU) messages associated with decoded bits. The VNU message is processed by the CNUs and converted into a CNU message for further processing by one or more VNUs. The amount of circuitry utilized is generally proportional to performance of a CNU message processing circuit. In some embodiments, a CNU message is stored in a plurality of flip-flop registers to achieve high processing bandwidth. Large multiplexer and de-multiplexer units are typically required to access the plurality of flip-flop registers.